Rouse Award: Daniel Myhill’s central processing unit design

Daniel Myhill (Upper Sixth) designed and created a central processing unit (CPU) using a field-programmable gate array (FPGA) to win the Rouse Artefact Award.

Stemming from his interest in computer science and programming, Daniel decided to put his skills to the test to make a simple CPU, the key unit that processes all the data used on a computer.

He explained: “Most computer components are made up of little gate switches, which are very simple logical things.

“In an FPGA, there are lots of them and you can define what they do on the fly. You can change what they do and how the gates are connected, so when the FPGA runs, it acts like a CPU.

“I just thought it would be fun to make something basic, although it wasn’t as basic as I thought it would be!”

A close-up of Daniel’s CPU, created using an FPGA

Daniel investigated how CPUs are programmed and what he would need to try to do to make his idea work in reality, including getting to grips with the Xilinx Vivado software used in designing FPGAs.

He said: “It wasn’t so much trial and error as trying to figure out how to use this to do what I wanted.

“It felt really good to get the CPU working. It didn’t work until right near the end, but it was so satisfying when it did.

“There were limitations because I had to cut a few corners to get it done in time. I’d like to eventually get round to making it a bit better, instead of just getting it done for a deadline, and get it working with all the features.

“The CPU I’ve made is more of a novelty rather than being practical in and of itself, but the process of making it was the most practical thing from my point of view.”


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